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ADSP-2191 Host Port booting
PCB design

Version:   1.00
Date:      23.10.2003
Author:    Michael Kuegler
Company:   Analog Devices, Inc.

Platform:  Protel Design Explorer 99 SE, Service Pack 6

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This directory contains the PCB design for the project "ADSP-2191 Host Port
booting". The design is used to connect two ADSP-2191 EZ-KITs. The External
Port on the Host is connected to the Host Port on the Target via the Mictor
connectors on the EZ-KITs.
The configuration jumpers on the PCB are used to configure the Host Port. They
override the settings on the Target EZ-KIT (the resistors on the custom made
PCB have smaller values than the resistors on the EZ-KIT). The following table
shows the possible jumper settings. The default values, marked with asterisks,
set up the Host Port in mode ACK and ACC.

  Jumper | Position |      Function
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    J1   |   1-2*   | Mode for HACK; default is ACK
         |   2-3    | (see ADSP-2191 HRM for details)
    J2   |   1-2*   | /HRD is low active
         |   2-3    | /HRD is high active
    J3   |   1-2*   | /HWR is low active
         |   2-3    | /HWR is high active
    J4   |   1-2    | HACK is low active
         |   2-3*   | HACK is high active
    J5   |   1-2*   | HALE acts in ACC mode
         |   2-3    | HALE acts in ALE mode

  * default setting

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Files contained in this directory:

Host 2191 Overview.sch        Schematic diagram, master document
Host 2191 Miscellaneous.sch   Schematic diagram, miscellaneous (JTAG, clock, power supply)
Host 2191 PLD.sch             Schematic diagram, PLD and connectors
Host 2191 PCB.pcb             Board layout
Host 2191 Schematic.lib       Schematic diagram library
Host 2191 PCB.lib             Layout library

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